1. Field of the Invention:
The present invention relates to broadband signal switching equipment, and more particularly to such equipment comprising a crosspoint matrix constructed in field-effect transistor (FET) technology having matrix input lines which are connectible via crosspoints respectively formed with pairs of switching elements to matrix output lines respectively formed with two signal conductors.
2. Description of the Prior Art
If emitter-coupled logic (ECL) technology can be characterized by properties such as high working speed, (medium) high degree of integration and (medium) high dissipated power, then FET technology, given what are only moderate working speeds in comparison thereto, is characterized by an extremely-high degree of integration and extremely-low power dissipation. These latter properties have led to efforts to penetrate into speed ranges with integrated circuits constructed in FET technology that had been previously reserved for and only generally obtainable in bipolar technology.
For a broadband signal switching equipment having a crosspoint matrix that comprises matrix input lines respectively formed with two signal conductors, these matrix input lines being, in turn, respectively connected to two difference (complementary) outputs of an input digital signal circuit and, on the other hand, being connectible via crosspoints to matrix output lines that are likewise respectively formed with two signal conductors, the matrix output lines having their two signal conductors respectively leading to the two signal inputs of an output amplifier circuit formed with a differential amplifier, a crosspoint matrix constructed in FET technology is known in this context, as disclosed in the European application 0 264 046, corresponding to U.S. Pat. No. 4,897,645, fully incorporated herein by this reference, that is provided with pairs of switching elements each respectively formed with two switching transistors that have their respective control electrodes charged with a through-connect or, respectively, inhibit signal, a main electrode of these switching transistors being respectively connected to the one or to the other signal conductor of the appertaining matrix output line that is, in turn, provided with an output differential amplifier having a trigger behavior, whereby the pairs of switching elements respectively comprise two input transistors that respectively form a series circuit with a switching transistor,
these input transistors having their respective control electrodes connected to the one or to the other signal conductor of the appertaining matrix input line and having their respective main electrodes facing away from the series circuit connected via a sampling transistor to the one terminal (ground) of the operating voltage source to whose other terminal each signal conductor of the respective matrix output line is respectively connected via a precharging transistor, PA0 and whereby precharging transistors and sampling transistors have their respective control electrodes charged oppositely to one another with a switching matrix network drive clock that subdivides a bit through-connect time interval into a precharging phase and into the actual through-connect phase, so that, given an inhibited sampling transistor, both signal conductors of the matrix output line are charged via the respective precharging transistor in each preliminary phase or precharging phase to at least approximately the potential prevailing at the other mentioned terminal of the operating voltage source. PA0 whereby the pairs of switching elements are respectively formed with two switching transistors that have, respectively, their control electrodes charged with a through-connect or, respectively, inhibit signal and have their main electrodes connected to the one or, respectively, to the other signal conductors of the matrix output line and are respectively formed with two input transistors that respectively form a series circuit with a switching transistor, PA0 whereby precharging transistors and sampling transistors have their respective control electrodes charged oppositely relative to one another with a switching matrix network drive clock that subdivides a bit through-connect time interval into a precharging phase and into the actual through-connect phase. Therewith, given an inhibited sampling transistor, both signal conductors of the matrix output line are charged via the respective precharging transistor in each preliminary phase to at least approximately the potential prevailing at the said other terminal of the operating voltage source,
In addition to the advantages that are involved with a crosspoint matrix constructed and kept exclusively in FET technology, this known broadband signal switching equipment yields a further advantage in that, given an inhibited crosspoint, that no disturbing signals, on the one hand, proceed via the crosspoint to the matrix output even without additional attenuation measures and in that, given a conductive crosspoint, charge reversals of the matrix output line, on the other hand, that may occur in the actual bit-through connection phase always proceed in only one charge reversal direction proceeding from the one operating potential corresponding to the one signal state and, therefore, an unambiguous change of the through-connected digital signal appearing at the output of the switching equipment from the one into the other signal state is already connected with a small charge reversal (corresponding to the upper transgression of the threshold adjacent to this value of the operating potential and corresponding to the trigger point of the differential amplifier), and, therefore, correspondingly fast.
In such a broadband signal switching equipment, a further increase in the operating speed can be enabled in that the two precharging transistors have their main electrodes facing toward the respective matrix output line connected to one another via a cross or transverse transistor whose control electrode is connected to the control electrodes of the precharging transistors (see European application 0 345 623, corresponding to U.S. Pat. No. 4,949,086, full incorporated herein by this reference). In conjunction with the advantage of speeding up the precharging of the matrix output lines, this yields a further advantage of an extremely-early balancing of the potentials of the matrix output lines, so that the starting conditions for reliable amplification by a following differential amplifier are also established correspondingly early.
The advantages which may be obtained in view of the power dissipation requirement and operating speed with such a known broadband switching equipment that comprises matrix input lines respectively formed with two signal conductors involve a corresponding space requirement for such respective two signal conductors of the matrix input lines.
In comparison thereto, another, known broadband signal switching equipment having a crosspoint matrix constructed in FET technology whose matrix input lines are connectible via crosspoints formed with respective switching elements pairs to matrix output lines respectively formed with two signal conductors at whose two signal conductors the two signal inputs of an output amplifier circuit formed with a differential amplifier having a trigger behavior are connectible,
the input transistors having their control electrodes respectively connected to a signal conductor of the appertaining matrix input line and having their main electrodes respectively facing away from the series circuit connected to the one terminal of the operating voltage source via a sampling transistor that is individually associated with the switching element, to the matrix input line or to the matrix output line, each signal conductor of the respective matrix output line being connected via a respective precharging transistor to the other terminal of the operating voltage source,
and whereby the two precharging transistors have their main electrodes facing toward the respective matrix output line connected to one another via a cross or transverse transistor whose control electrode is connected to the control electrodes of the precharging transistors.
This structure has a lower space requirement in that the pairs of switching elements each respectively comprise two input transistors of different channel type that have their control electrodes connected to one and the same signal conductor of the appertaining matrix input line, as disclosed in the German patent application 39 09 550, corresponding to the U.S. Patent application Ser. No. 497,323, filed Mar. 22, 1990 and fully incorporated herein by this reference.
Given a correspondingly-reduced space requirement, such a known broadband signal switching equipment requires only a single signal conductor per matrix input line, but simultaneously preserves the other special characteristics and advantageous properties of the initially-mentioned, known broadband signal switching equipment.